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SkyEgg Uses Equality Saturation for Heterogeneity-Aware FPGA Hardware Synthesis
A research paper presents SkyEgg, a hardware synthesis approach that applies equality saturation to exploit the varying resource capabilities and timing configurability of modern FPGAs. The method aims to bridge high-level programs and accelerator designs by accounting for heterogeneous hardware resources during synthesis. The work is published on arXiv under cs.CL as a cross-listing replacement.